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A Product Line of
Diodes Incorporated
ZXLD1371
Electrical Characteristics (cont.) (Test conditions: V IN = V AUX = 12V, T A = 25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Output Parameters
V FLAGL
FLAG pin low level output voltage
Output sinking 1mA
0.5
V
I FLAGOFF FLAG pin open-drain leakage current
V FLAG = 40V
1
μA
Normal operation
Out of regulation (V SHP out of range)
( Note 11 )
4.2
3.3
4.5
3.6
4.8
3.9
V STATUS
STATUS Flag no-load output voltage
( Note 10 )
V IN under-voltage (V IN < UVLO)
Switch stalled (t ON or t OFF > 100μs)
3.3
3.3
3.6
3.6
3.9
3.9
V
Over-temperature (T J > 125°C)
Excess sense resistor current
(V SENSE > 0.32V)
1.5
0.6
1.8
0.9
2.1
1.2
R STATUS
Output impedance of STATUS output
Normal operation
10
k ?
Driver output (PIN GATE)
V GATEH
V GATEL
High level output voltage
Low level output voltage
No load Sourcing 1mA
( Note 12 )
Sinking 1mA, ( Note 13 )
10
11
0.5
V
V
V GATECL
I GATE
High level GATE CLAMP voltage
Dynamic peak current available during
rise or fall of output voltage
V IN = V AU X = V ISM = 18V
I GATE = 1mA
Charging or discharging gate of
external switch with Q G = 10nC and
400kHz
12.8
±300
15
V
mA
Time to assert ‘STALL’ flag and
t STALL
warning on STATUS output
GATE low or high
100
170
μs
( Note 14 )
LED Thermal control circuit (T ADJ ) parameters
V TADJH
V TADJL
I TADJ
Upper threshold voltage
Lower threshold voltage
T ADJ pin Input current
Onset of output current reduction
(V TADJ falling)
Output current reduced to <10% of
set value (V TADJ falling)
V TADJ = 1.25V
560
380
625
440
690
500
1
mV
mV
μA
Notes:
10. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence.
For example ‘Excessive coil current’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.
These STATUS pin voltages apply for an input voltage to V IN of 7.5V < V IN < 60V. Below 7.5V the STATUS pin voltage levels reduce and
therefore may not report the correct status. For 5.4V < V IN < 7.5V the flag pin still reports any error by going low. At low V IN in Boost and
Buck-boost modes an over-current status may be indicated when operating at high boost ratios – this due to the feedback loop increasing
the sense voltage.
For more information see the Application Information section about Flag/Status levels.
11. Flag is asserted if V SHP < 1.5V or V SHP > 2.5V
12. GATE is switched to the supply voltage V AUX for low values of V AUX (5V ≤ V AUX ≤ ~12V). For V AUX > 12V, GATE is clamped internally to prevent
it exceeding 15V.
13. GATE is switched to PGND by an NMOS transistor
14. If t ON exceeds t STALL , the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If t OFF exceeds t STALL , the switch will
remain off until normal operation is possible.
ZXLD1371
Document number: DS35436 Rev. 1 - 2
6 of 42
www.diodes.com
February 2012
? Diodes Incorporated
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